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"ELECTRICAL TESTING" OR 电力测试
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Probe (6)
Package (4)
Integrated Circuits (3)
Dice (2)
Electronic Device (2)
Wafer to Perform (2)
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1.
Inventor:
David D C Chang { }
Assignee:
AT&T Corp { }
Attorney:
Roderick B Anderson
;
Kenneth M Brown
Title:
Electrical test apparatus and method
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5500605
Publication date :
1996-03-19
Referenced by:
112
Reference cited:
10
2.
Inventor:
Salman Akram { }
Assignee:
Micron Technology, Inc { }
Title:
Method of fabricating a multi-chip module
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6214641
Publication date :
2001-04-10
Referenced by:
100
Reference cited:
13
3.
Inventor:
Richard Allan Deckert { }
;
Steven Engelking { }
;
Joey Dean Evans { }
Assignee:
Sony Electronics Inc { }
Title:
Integrated testing method and apparatus for semiconductor testoperations processing
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6137303
Publication date :
2000-10-24
Referenced by:
96
Reference cited:
4
4.
Inventor:
Lau James C K
;
Malmgren Richard P
;
Lui Kenneth
Assignee:
TRW Inc
Title:
Testing device for integrated circuits on wafer
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5479109
Publication date :
1995-12-26
Referenced by:
95
Reference cited:
22
5.
Inventor:
Nolan Charles C
;
Sahr Stuart
Assignee:
Signatone Corporation
Attorney:
Castle Linval B
Title:
Temperature conditioner for tests of unpackaged semiconductors
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
4845426
Publication date :
1989-07-04
Referenced by:
93
Reference cited:
2
6.
Inventor:
Jerrold L King { }
;
Leland R Nevill { }
Assignee:
Micron Technology, Inc { }
Title:
Semiconductor chip package
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6198172
Publication date :
2001-03-06
Referenced by:
82
Reference cited:
3
7.
Inventor:
Luen-Chian Sun { }
Assignee:
Taiwan Semiconductor Manufacturing Co, Ltd { }
Title:
Probing of device elements
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6902941
Publication date :
2005-06-07
Referenced by:
81
Reference cited:
6
8.
Inventor:
Clarke Norman B
;
Cook Lawrence G
;
Doyle Robert G
;
Renner Michael
Assignee:
International Business Machines Corporation
Attorney:
Whitham & Marhoefer
Title:
Molded test probe assembly
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5334931
Publication date :
1994-08-02
Referenced by:
80
Reference cited:
16
9.
Inventor:
Kong Alvin M
;
Lau James C
;
Chan Steven S
Assignee:
TRW Inc
Title:
Mass simultaneous sealing and electrical connection of electronic devices
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5448014
Publication date :
1995-09-05
Referenced by:
74
Reference cited:
12
10.
Inventor:
Keith E Barrett { }
Assignee:
Micron Technology, Inc { }
Title:
Test interposer for use with ball grid array packages assemblies andball grid array packages including same and methods
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6081429
Publication date :
2000-06-27
Referenced by:
72
Reference cited:
20
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